1. Field of the Invention
The embodiments below relate generally to magnetic memory devices, and more particularly to thermally-assisted programming operations in magnetic memory devices.
2. Background of the Invention
Magnetic memory devices comprise one or more magnetic memory cells that include a magnetic media with a switchable orientation of magnetization. The ability to store data in magnetic media is dependent on the ability to control the orientation of magnetization of the magnetic media. The ability to change, or switch the orientation of magnetization of the magnetic media allows the storage of a data bit, i.e., a logic state of “0” or “1”, within a magnetic memory cell. One orientation of magnetization for the magnetic memory cell can be equated with the logic “0”, while the opposite orientation of magnetization can be equated with the logic “1”.
The coercivity of a magnetic media is the level of demagnetizing force that must be applied to the magnetic media in order to reduce and/or reverse the orientation of magnetization of the magnetic media. Thus, a magnetic field sufficient to overcome the coercivity of the magnetic media included in a magnetic memory cell, must be applied in order to change the logic state of the magnetic memory cell from one state to the other. Generally, the smaller the magnetic media, the higher its coercivity and the higher magnetic field required to change logic states increases.
There are several known magnetic memory cells for use in magnetic memory devices, such as Magnetic Random Access Memory (MRAM) arrays, including the Tunneling Magneto-Resistant Memory (TMR) cell with or without Synthetic Anti-Ferromagnetic structure (SAF), the Giant Magneto-Resistant Memory (GMR) cell with or without Synthetic Anti-Ferromagnetic structure (SAF), and the Colossal Magneto-Resistance Memory (CMR) cell. Each of these memory cells comprises a data layer, which can also be referred to as a storage layer or bit layer, a reference layer, and an intermediate layer between the data layer and the reference layer. The data layer, reference layer, and intermediate layer can each be fabricated from one or more layers and material.
The data layer is usually a layer of magnetic material that stores a bit of data as an orientation of magnetization that may be altered in response to the application of an external magnetic field or fields as described above. In other words, the orientation of magnetization of the data layer representing the logic state can be rotated, or switched, from a first orientation representing a logic state of, e.g., “0” to a second orientation representing a logic state of, e.g., “1”, and vice versa.
The reference layer is usually a layer of magnetic material in which an orientation of magnetization is “pinned”, or fixed in a predetermined direction. Often, several layers of magnetic material are required and function as one to affect the stable pinned reference layer. The predetermined direction is establish by microelectronic processing steps employed in the fabrication of the magnetic memory cell.
Magnetic memory devices, such as MRAMs, often employ Magnetic Tunnel Junction (MTJ) memory cells comprising one of the memory cells described above positioned at the transverse intersections of electrically conductive rows and columns. Such an arrangement is often referred to as a cross point memory array.
The logic state of each cell in such a cross point array depends on the relative orientations of magnetization in the data layer and the reference layer. When an electrical potential bias is applied across the data layer and reference layer by application of appropriate voltages to the associated electrically conductive rows and columns, electrons migrate between the data layer and the reference layer to the intermediate layer. The phenomenon that causes the migration of electrons to the intermediate layer is referred to as quantum mechanical tunneling or spin tunneling. The logic state can then be determined by sensing the flow of electrons and measuring the resistance of the memory cell.
For example, if the overall orientation of the magnetization in the data storage layer is parallel to the pinned orientation of magnetization in the reference layer, then the magnetic memory cell will be in a state of low resistance. If the overall orientation of the magnetization of the data storage layer is anti-parallel, or opposite to the pinned orientation of the magnetization in the reference layer, then the magnetic memory cell will be in a state of high resistance. The low resistance state and high resistance state can then be associated with a logic state so that the logic state of the memory cell can be determined by sensing the current through the memory cell and measuring the associated resistance of the memory cell.
The electrically conductive rows and columns comprising a cross point memory array are typically referred to as word and bit lines. Thus the logic state of a targeted memory cell in a cross point array can be determined by selecting the appropriate word and bit line.
Magnetic memory devices typically comprise additional bit lines that can be used to alter the orientation of magnetization of one or more of the magnetic memory cells comprising cross point array when the appropriate voltages are applied to the word and bit lines associated with the target memory cell. Current flowing in these additional bit lines generate a magnetic field around the bit line. The direction of this magnetic field, can influence the orientation of magnetization of the target memory cell. If the magnetic fields created by the current flowing in one of these bit lines is of sufficient strength, then it can overcome the coercivity of the target memory cell and rotate or switch the orientation of magnetization of the target memory cell.
Accordingly, in order to change the logic state of the magnetic memory cell, the additional bit lines must be sufficiently close to the magnetic memory cells, such that the magnetic field created by current flow in the additional bit lines can influence the orientation of magnetization of the memory cell. Additionally, sufficiently high currents must be used in order to create a magnetic field with sufficient strength to overcome the coercivity of the magnetic memory cell.
Altering the direction of the current flowing in the additional bit lines, will change the direction of the magnetic field it creates, which can cause the orientation of magnetization of the memory to be switched in the other direction.
Write, or program operations generally require greater electrical current and magnetic fields relative to read operations. The greater electrical currents also require more robust characteristics in the power supply and larger switching transistors. The greater electrical current and magnetic field also require an appropriate buffering space between neighboring cells. This is because it is undesirable to adversely affect the data layers of neighboring cells, when programming a logic state of a target cell. As a result, designer manufacturing issues are generally focused upon requirements proposed by the write operation.
Because the coercivity of magnetic memory devices is increasing due to the reduction in size of such devices, larger power sources and larger switching transistors are required in order to provide the current need to overcome the coercivity of the memory cells. The larger currents generated by these larger power sources and larger switching transistors has the potential to affect the state of neighboring memory cells. Accordingly, as magnetic memory devices shrink, a more and more significant amount of the overall space of the memory device is used to provide physical buffering between memory cells. Absent this buffering space, greater “cross talk” issues would arise.
All of these issues make achieving small, compact, highly dense magnetic memory devices difficult. In other words, the inclusion of additional bit lines for programming the memory cells, larger power sources, larger switching transistors, and increased isolation space, all transpire to reduce the density achievable in conventional magnetic memory devices. Increasing the density, e.g., at the expense of isolation space, increases the risks and problems associated with cross talk between memory cells.
Moreover, the larger power sources and switching transistors needed to provide the sufficient current to overcome the coercivity of the smaller memory cells, increase its power consumption for conventional magnetic memory devices. It will be understood that the increase power consumption is generally not desirable, especially for the increasing number of portable applications.